bn:03595094n
Noun Concept
Categories: Instruction processing, All Wikipedia articles written in American English, Computer memory, Consistency models
EN
memory barrier  fence instruction  membar  memory fence
EN
In computing, a memory barrier, also known as a membar, memory fence or fence instruction, is a type of barrier instruction that causes a central processing unit or compiler to enforce an ordering constraint on memory operations issued before and after the barrier instruction. Wikipedia
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EN
In computing, a memory barrier, also known as a membar, memory fence or fence instruction, is a type of barrier instruction that causes a central processing unit or compiler to enforce an ordering constraint on memory operations issued before and after the barrier instruction. Wikipedia
An instruction that enforces an ordering constraint on memory operations issued before and after it. Wiktionary
EN
Memory barriers are necessary because most modern CPUs employ performance optimizations that can result in out-of-order execution. Wiktionary
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