Login Preferences
About News Publications Statistics Downloads API Guide License How to use Preferences
bn:14009195n
Noun Concept
Categories: MIPS Technologies, Computer-related introductions in 1985, Advanced RISC Computing, MIPS architecture, archived copy as title
EN
MIPS architecture  MIPS  MIPSel  application-specific extensions  Microprocessor without Interlocked Pipeline Stages
EN
MIPS is a family of reduced instruction set computer instruction set architectures : A-1 : 19  developed by MIPS Computer Systems, now MIPS Technologies, based in the United States. Wikipedia
Definitions
Relations
Sources
EN
MIPS is a family of reduced instruction set computer instruction set architectures : A-1 : 19  developed by MIPS Computer Systems, now MIPS Technologies, based in the United States. Wikipedia
A RISC instruction set architecture Wikipedia Disambiguation
MIPS when running in little-endian mode Wikidata
Instruction set architecture Wikidata
IS A
platform
instruction set
BASED ON
MIPS architecture
DERIVATIVE WORK
MIPS architecture
Wikipedia
EN
MIPS architecture
Wikidata
EN
MIPS, MIPSel
Wikipedia Redirections
EN
application-specific extensions, Microprocessor without Interlocked Pipeline Stages, MIPS16e ASE, MIPS32, Mips4, MIPS64, Mips64el, MIPS assembly, MIPS chip, MIPS CPU, MIPS I, MIPS II, MIPS III, MIPS instruction set, MIPS ISA, MIPS IV, MIPS processor, MIPS V, mipsel
Wikidata Alias
EN
Microprocessor without Interlocked Pipeline Stages, MIPS Architecture

Please note that, in order to improve your browsing experience on this website, BabelNet® uses various types of cookies, including: browsing functionality, performance and statistical cookies.

By continuing to browse the site you are agreeing to our use of cookies. OK

License